View IDT74ALVCH16409_323150.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

IDT74ALVCH16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER WITH 3-STATE OUTPUTS AND BUS-HOLD
* 0.5 MICRON CMOS Technology * Typical tSK(o) (Output Skew) < 250ps * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * VCC = 3.3V 0.3V, Normal Range * VCC = 2.7V to 3.6V, Extended Range * VCC = 2.5V 0.2V * CMOS power levels (0.4 W typ. static) * Rail-to-Rail output swing for increased noise margin * Available in SSOP, TSSOP, and TVSOP packages
IDT74ALVCH16409
FEATURES:
DESCRIPTION:
DRIVE FEATURES:
* High Output Drivers: 24mA * Suitable for heavy loads
APPLICATIONS:
* 3.3V high speed systems * 3.3V and lower voltage computing systems
This 9-bit, 4-port universal bus exchanger is built using advanced dual metal CMOS technology. The ALVCH16409 allows synchronous data exchange between four different buses. Data flow is controlled by the select (SEL0-SEL4) inputs. A data-flow state is stored on the rising edge of the clock (CLK) input if the select-enable (SELEN) input is low. Once a data-flow state has been established, data is stored in the flip-flop on the rising edge of CLK if SELEN is high. The data-flow control logic is designed to allow glitch-free data transmission. When preset (PRE) transitions high, the outputs are disabled immediately without waiting for a clock pulse. To leave the high-impedance state, both PRE and SELEN must be low and a clock pulse must be applied. The ALVCH16409 has been designed with a 24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. The ALVCH16409 has "bus-hold" which retains the inputs' last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
C LK SELEN SEL0 SEL1
56 1
PRE SEL2 SEL3 SEL4
55
28
2
Flow and Storage Control
29
27
30
3 2A x 1A x 1B x 2A x 2Bx 2B x 1Ax 3 1Ax CLK D 2A 1 15 1Bx 2Bx
3 CLK D 54 1B1
CLK D 1A 1 3
3 1A x 2A x 1B x
1B x CLK D 42 2B x 2B1
2Ax One of 9 Channels
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
(c) 1999 Integrated Device Technology, Inc.
OCTOBER 1999
DSC-4572/1
IDT74ALVCH16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Max VTERM(2) Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Continuous Clamp Current, VI < 0 or VI > VCC Continuous Clamp Current, VO < 0 Continuous Current through each VCC or GND -0.5 to +4.6 -0.5 to VCC+0.5 -65 to +150 -50 to +50 50 -50 100 VTERM(3) TSTG IOUT IIK IOK ICC ISS
Unit V V C mA mA mA mA
PRE SEL0
1A1
CLK SELEN
1B1
GND
1A2 1A3
GND
1B2 1B3
VCC
1A4 1A5 1A6
VCC
1B4 1B5 1B6
GND
1A7 1A8 1A9 2A1 2A2 2A3
GND
1B7 1B8 1B9 2B1 2B2 2B3
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. All terminals except VCC.
CAPACITANCE (TA = +25C, F = 1.0MHz)
Symbol CIN COUT CI/O Parameter(1) Input Capacitance Output Capacitance I/O Port Capacitance Conditions VIN = 0V VOUT = 0V VIN = 0V Typ. 5 7 7 Max. 7 9 9 Unit pF pF pF
GND
2A4 2A5 2A6
GND
2B4 2B5 2B6
NOTE: 1. As applicable to the device type.
PIN DESCRIPTION
Pin Names PRE SELEN SEL0 - SEL4 CLK xAx xBx Description Preset Input (Active LOW) Select Enable Input (Active LOW) Select Inputs Clock Input A-to-B Data Inputs or B-to-A 3-State Outputs(1) B-to-A Data Inputs or A-to-B 3-State Outputs(1)
VCC
2A7 2A8
VCC
2B7 2B8
GND
2A9
GND
2B9
SEL1 SEL2
SEL4 SEL3
NOTE: 1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
FUNCTION TABLE(1)
SSOP/ TSSOP/ TVSOP TOP VIEW Inputs CLK H L Send Port L H X X Output Receive Port L H B(2) B(2)
NOTES: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care = LOW-to-HIGH Transition 2. Output level before the indicated steady-state input conditions were established.
2
IDT74ALVCH16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
INDUSTRIAL TEMPERATURE RANGE
DATA FLOW CONTROL
Inputs PRE H L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L SELEN X H L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L CLK X SEL0 X X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 SEL1 X X 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 SEL2 X X 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 SEL3 X X 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 SEL4 X X 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 All outputs disabled No change None, all I/Os off Not used Not used Not used Not used Not used Not used Not used 2A to 1A and 1B to 2B 2A to 1A 2B to 1B 2A to 1A and 2B to 1B 1A to 2A and 1B to 2B 1A to 2A 1B to 2B 1A to 2A and 2B to 1B 1A to 1B and 2B to 2A 1A to 1B 2A to 2B 1A to 1B and 2A to 2B 1B to 1A and 2A to 2B 1B to 1A 2B to 2A 1B to 1A and 2B to 2A 2B to 1A and 2A to 1B 1B to 2A 2B to 1A 2B to 1A and 1B to 2A 1A to 2B and 1B to 2A 1A to 2B 2A to 1B 1A to 2B and 2A to 1B Data Flow
3
IDT74ALVCH16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = -40C to +85C
Symbol VIH VIL IIH IIL IOZH IOZL VIK VH ICCL ICCH ICCZ ICC Parameter Input HIGH Voltage Level Input LOW Voltage Level Input HIGH Current Input LOW Current High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = 2.3V, IIN = -18mA VCC = 3.3V VCC = 3.6V VIN = GND or VCC One input at VCC - 0.6V, other inputs at VCC or GND VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V VCC = 3.6V VCC = 3.6V VI = VCC VI = GND VO = VCC VO = GND Test Conditions Min. 1.7 2 -- -- -- -- -- -- -- -- -- Typ.(1) -- -- -- -- -- -- -- -- -0.7 100 0.1 Max. -- -- 0.7 0.8 5 5 10 10 -1.2 -- 40 V mV A A A A V Unit V
Quiescent Power Supply Current Variation
--
--
750
A
NOTE: 1. Typical values are at VCC = 3.3V, +25C ambient.
BUS-HOLD CHARACTERISTICS
Symbol IBHH IBHL IBHH IBHL IBHHO IBHLO
NOTES: 1. Pins with Bus-Hold are identified in the pin description. 2. Typical values are at VCC = 3.3V, +25C ambient.
Parameter(1) Bus-Hold Input Sustain Current Bus-Hold Input Sustain Current Bus-Hold Input Overdrive Current VCC = 3V VCC = 2.3V VCC = 3.6V
Test Conditions VI = 2V VI = 0.8V VI = 1.7V VI = 0.7V VI = 0 to 3.6V
Min. - 75 75 - 45 45 --
Typ.(2) -- -- -- -- --
Max. -- -- -- -- 500
Unit A A A
4
IDT74ALVCH16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
INDUSTRIAL TEMPERATURE RANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol VOH Parameter Output HIGH Voltage VCC = 2.3V VCC = 2.3V VCC = 2.7V VCC = 3V VCC = 3V VOL Output LOW Voltage VCC = 2.3V to 3.6V VCC = 2.3V VCC = 2.7V VCC = 3V IOH = - 24mA IOL = 0.1mA IOL = 6mA IOL = 12mA IOL = 12mA IOL = 24mA Test Conditions(1) VCC = 2.3V to 3.6V IOH = - 0.1mA IOH = - 6mA IOH = - 12mA Min. VCC - 0.2 2 1.7 2.2 2.4 2 -- -- -- -- -- Max. -- -- -- -- -- -- 0.2 0.4 0.7 0.4 0.55 V Unit V
NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = - 40C to + 85C.
OPERATING CHARACTERISTICS, TA = 25C
VCC = 2.5V 0.2V Symbol CPD CPD Parameter Power Dissipation Capacitance Outputs enabled Power Dissipation Capacitance Outputs disabled Test Conditions CL = 0pF, f = 10Mhz Typical -- -- VCC = 3.3V 0.3V Typical 60 60 Unit pF
5
IDT74ALVCH16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS(1)
VCC = 2.5V 0.2V Symbol fMAX tPLH tPHL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tSU tSU tSU tSU tH tH tH tW tSK(o) Propagation Delay CLK to xAx or xBx Output Enable Time CLK to xAx or xBx Output Disable Time CLK to xAx or xBx Output Disable Time PRE to xAx or xBx Set-up Time, HIGH or LOW, xAx or xBx before CLK Set-up Time, HIGH or LOW, SEL before CLK Set-up Time, HIGH or LOW, SELEN before CLK Set-up Time, HIGH or LOW, PRE before CLK Hold Time, HIGH or LOW, xAx or xBx after CLK Hold Time, HIGH or LOW, SEL after CLK Hold Time, HIGH or LOW, SELEN after CLK Pulse Duration, CLK HIGH or LOW Output Skew(2) 1.9 5.1 2.5 1 0.8 0 0.5 4.2 -- -- -- -- -- -- -- -- -- -- 1.9 4.2 2.5 1 0.8 0 0.5 4.2 -- -- -- -- -- -- -- -- -- -- 1.4 3.5 1.8 0.7 1 0 0.8 3 -- -- -- -- -- -- -- -- -- 500 ns ns ns ns ns ns ns ns ps 2.8 7.5 -- 6.5 2.5 6.1 ns 2.3 7.1 -- 6 2 5.7 ns 2.4 6.9 -- 6.3 2 5.7 ns Parameter Min. 120 1.5 Max. -- 6 VCC = 2.7V Min. 120 -- Max. -- 5.7 VCC = 3.3V 0.3V Min. 120 1.5 Max. -- 5.1 Unit MHz ns
NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = - 40C to + 85C. 2 Skew between any two outputs of the same package and switching in the same direction.
TIMING DIAGRAM
CLK
t SU
SELEN
th
t SU
SEL
th
t disC LK
Send Port
tSU
th
tpd CLK
Receive Port
ten CLK
6
IDT74ALVCH16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
INDUSTRIAL TEMPERATURE RANGE
VIH VT 0V VOH VT VOL VIH VT 0V
ALVC Link
TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS
Symbol VLOAD VIH VT VLZ VHZ CL VCC(1)= 3.3V0.3V VCC(1)= 2.7V 6 2.7 1.5 300 300 50
VCC 500 Pulse Generator
(1, 2)
SAME PHASE INPUT TRANSITION
VCC(2)= 2.5V0.2V 2 x Vcc Vcc Vcc / 2 150 150 30
Unit V V V mV mV pF
VLOAD Open GND
tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION
tPHL
6 2.7 1.5 300 300 50
tPHL
Propagation Delay
ENABLE CONTROL INPUT tPZL OUTPUT SWITCH NORMALLY CLOSED LOW tPZH OUTPUT SWITCH NORMALLY OPEN HIGH VLOAD/2 VT tPHZ VT 0V tPLZ DISABLE VIH VT 0V VLOAD/2 VLZ VOL VOH VHZ 0V
ALVC Link
VIN D.U.T.
VOUT
RT
500 CL
ALVC Link
Test Circuit for All Outputs
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTES: 1. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2ns; tR 2ns.
SWITCH POSITION
Test Open Drain Disable Low Enable Low Disable High Enable High All Other Tests Switch VLOAD GND Open
VIH INPUT VT 0V VOH OUTPUT 1 VT VOL VOH OUTPUT 2 tPLH2 tPHL2
ALVC Link
NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. VIH DATA VT INPUT 0V tSU tH VIH TIMING VT INPUT 0V tREM VIH ASYNCHRONOUS VT CONTROL 0V VIH SYNCHRONOUS VT CONTROL tSU 0V tH
ALVC Link
Enable and Disable Times
Set-up, Hold, and Release Times
tPLH1
tPHL1
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
VT
tSK (x)
tSK (x)
VT VOL
VT
ALVC Link
Pulse Width
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
Output Skew - tSK(X)
NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
7
IDT74ALVCH16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT ALVC X XX Bus-Hold Temp. Range XX Family XX XXX Device Type Package
PV PA PF 409 R16 H 74
Shrink Small Outline Package Thin Shrink Small Outline Package Thin Very Small Outline Package 9-Bit, 4-Port Universal Bus Exchanger with 3-State Outputs Double-Density, 12mA Bus-Hold -40C to +85C
CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054
for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com
for Tech Support: logichelp@idt.com (408) 654-6459
8

▲Up To Search▲

Price & Availability of IDT74ALVCH16409

	To Download IDT74ALVCH16409 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .